Differential Power Analysis of Deep Neural Networks with Mitigation at the Architecture Level
Paul D. Franzon
Project runs from 10/01/2019 to 09/30/2020
This proposal analyzes the vulnerability of deep neural network hardware implementations against power/electromagnetic side-channel attacks and their effective and automatic mitigation through architectural enhancements and compiler support. We will enhance RISC-V based microcontrollers through custom instruction extensions and use side-channel aware compilers to let programmers write side-channel secure software. The project will tape-out proof-of-concept chips with the proposed techniques.