Fast, Accurate PPA Model-Extraction, Center for Advanced Electronics through Machine Learning (CAEML) Core Project 3A2 funded with industry membership dues.
William R. Davis
Paul D. Franzon
Dror Zeev Baron
Project runs from 01/01/2019 to 12/31/2020
This project researches methods for extracting fast and accurate estimators from System-Level Architecture to Power, performance, and area (SLA2PPA) in digital integrated circuits. Specifically, this project focuses on elimination of the complicated gate-level simulations needed to make accurate predictions of power, which typically occur very late in the design process. Extraction of system-level power models is extremely difficult, because the data-points are so few and so noisy, while the number of possible model parameters is so huge. This project will develop a comprehensive data-mining methodology to maximize the accuracy of PPA predictions while minimizing the data-collection effort.