David R. Wooten

David R. Wooten entered NC State University after serving in the US Air Force and received his BS in Electrical Engineering in 1974. While an EE undergrad, he worked in Professor John Staudhammer's graphics research lab and co-authored (with Ph.D. student Jeff Eastman) a SIGGRAPH paper entitled "A general purpose, expandable processor for real-time computer graphics.”

In 1976, after jobs in microprocessor and graphics hardware, David joined Mostek as Senior Applications Engineer closely involved with DRAM development. This led to his becoming the first employee at newly formed Inmos Corp in 1978. There David developed a number of DRAM techniques that became industry standards (nibble mode, CAS-before-RAS refresh, folded bit line memory cell architecture) as well as designing the world's fastest DRAMs. The DRAM cell architecture that David developed has been used in every DRAM manufactured in the last 40 years. David received three patents on his work at Inmos, and he was an influential contributor to many JEDEC DRAM standards.

After leading start-up teams in several companies from 1983 to 1990, David joined Compaq Corporation, advancing to Compaq Fellow and guiding new technology development. He was extremely active in the development of industry standards, including Chair of the IEEE 1394b standards group and the 1394 Trade Association. David was principal architect for USB 1.0, USB 1.1, and USB 2.0. In 2000-2003, he continued his work in this field as a Vice President at Cypress Semiconductor and led the work on the OHCI standards for both USB and 1394.

In 2003, David joined Microsoft Corporation and worked extensively with Intel and AMD on virtualization and security issues until his retirement in 2016. David represented Microsoft on the Board of Directors and Technical Committee of the Trusted Computing Group, and was architect and specification editor for the Trusted Platform Module 2.0 (ISO/IEC 11889). David became a partner at Microsoft and received over 16 patents for his work in virtualization and security hardware.