Secure Extreme Environment Embedded Computing LDRD

This work will investigate a new approach to introducing faults and monitoring their effects on RISC-V, an open-source processor. It will also provide new metrics for determining the vulnerability of architectural registers and components and offer suggestions for hardening those components. The result is a better understanding of how faults propagate and how to protect NC State's processor architecture from them.

Sponsor

Principle Investigators

Amro Awad
Eric Rotenberg

More Details

The work will explore a novel framework for injecting faults and tracking fault propagation effects on open-source RISC-V processors. Also, exploring new metrics to describe vulnerable architectural registers and components, and recommendations for hardening.