VerIP: Hardware Support for Securely Leveraging Untrusted Intellectual Property Cores for Mission-Critical SoCs
This project will be implemented in a 16nm FPGA using the NC State University (NCSU) developed security wrapper generator.
This project implements hardware support through security wrappers that provide high-performance run-time verification and protection for untrusted IPs. Specifically, a security wrapper for a DDR memory controller, one of the most complex and widely used IPs, will protect data integrity and confidentiality when read/written to memory. Implementation will take place on a 16nm FPGA using NC State's security wrapper generator.
Sponsor
US Navy - Naval Surface Warfare Center
The grant—running from July 11, 2022 to July 10, 2023—is for a total of $559,996.
Principle Investigators
Amro Awad
More Details
In this project, we will implement hardware support through security wrappers that provide run-time high-performance verification and protection from untrusted IPs, while still able to use them. For instance, in an untrusted IP that implements a DDR memory controller, which is one of the most complex and widely used IPs, can be attached to a security wrapper that protects the integrity and confidentiality of data read/written from/to the memory through the untrusted memory controller.