James Tuck

Tuck received his BE (1999) from Vanderbilt University and his MS (2003) and PhD (2007) from University of Illinois at Urbana-Champaign. His overall research focus is in computer architecture and compiler design, with the main focus on chip multiprocessors (CMPs) and hardware and compiler support for aggressive speculative execution. Tuck has been awarded two IEEE Micro Top Picks Paper Awards, honoring the papers most likely to impact industry, for his work on speculative execution. Tuck is a member of Tau Beta Phi, the IEEE Computer Society, and the ACM.

Education

2007 - Ph.D. in Computer Science, University of Illinois at Urbana-Champaign, IL
2003 - M.S. in Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, IL
1999 - B.E. in Computer Engineering, Vanderbilt University, Nashville, TN

Publications

• Dynamic and scalable DNA-based information storage (2020)
• The Case for Domain-Specialized Branch Predictors for Graph-Processing (2020)
• Driving the Scalability of DNA-Based Information Storage Systems (2019)
• Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory (2019)
• Hardware Supported Permission Checks On Persistent Objects for Performance and Programmability (2018)
• Lazy Persistency: a High-Performing and Write-Efficient Software Persistency Technique (2018)
• Characterizing the impact of soft errors across microarchitectural structures and implications for predictability (2017)
• Hiding the long latency of persist barriers using speculative execution (2017)
• Redirect: Reconfigurable directories for multicore architectures (2017)
• An accurate cross-layer approach for online architectural vulnerability estimation (2016)