Truths, Lies and Simulations — A Tutorial on Process Corner Models
Device models play the essential role of bridging technology and design. Yet, as the late statistician George Box once said, “all models are wrong, but some are useful.” Given this fundamental truth, this tutorial attempts to demystify the basics of how transistor models are constructed, what they attempt to capture, and how they are incomplete.
Alvin Loke
Senior Principal Engineer, Intel on August 28, 2026 at 10:15 AM in EB2 1231
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Alvin Loke is a senior principal engineer at Intel, San Diego, working on analog design/technology co-optimization for Intel's gate-all-around CMOS. He has previously worked on CMOS nodes spanning 250nm to 2nm at Agilent, AMD, Qualcomm, TSMC and NXP. Loke received a B.A.Sc. from the University of British Columbia and an M.S. and Ph.D. from Stanford. He has been an active IEEE Solid-State Circuits Society volunteer since 2003 and currently serves as VLSI Symposium secretary, SSCS Global Chapters chair and again as an SSCS Distinguished Lecturer. He frequently speaks on CMOS technology and its impact on analog design, having authored invited publications including the CICC 2018 Best Paper and short courses at ISSCC, VLSI Symposium, CICC and BCICTS.
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