An Artificial Intelligence Engineering System Analysis Assistant (Aiesaa) for Auto-Creation of Integrated Transmission-Distribution Grid Models

Control Hardware and Firmware Development for Back-to-Back High-Power Inverters

Exploring Surface and Bulk Defect States for High-Power Vertical GaN Diodes with Mg Implantation

Metastable Phase Synthesis via Electromagnetic Field Interactions

SATC: CORE: SMALL: An Automated Framework for Mitigating Single-Trace Side-Channel Leakage

Requirements for a 3DHI Power Microsystem (3DHIP) and Manufacturing Center

Artificial Intelligence-Enabled Tools (ArtIT) for Cyber Hardening of Power Grids

Indoor Base Station/Reflector Placement and Sleep Mode Optimization for mmWave Networks, BWAC Core Project

Membership in Broadband Wireless Access and Applications Center (BWAC) – NCSU Research Site

FSA: HENKEL Material Testing Services

CNS Core: Small: Towards Secure-By-Design Integration of Emerging Non-Volatile Memory in Future Systems

Systems-level Measurements of Biophysical Parameters in the Dorsal/NF-kappaB Pathway

CSR:Small: Rethinking Filesystem Encryption and Auditing in the Era of Byte-Addressable Non-Volatile Memories

Towards High-Performance Simulation of Hardware Designs

CNS Core: Small: Architecting Secure-by-Design ReRAM-Based Memories

Cirrus Logic Mixed Signal IC Design Fellowship

Efficient Parallel I/O in HDF5 for Accelerator Computing

Intergovernmental Personnel Act Agreement for Aryanya Chakrabortty

SemiSynBio-II: Engineering Write, Access, Read, and Protect (WARP) Drives for DNA-based Data Storage Systems

GMLC-HUB Project